74HC377 DATASHEET PDF
74HC datasheet, 74HC circuit, 74HC data sheet: PHILIPS – Octal D- type flip-flop with data enable; positive-edge trigger,alldatasheet, datasheet. 74HC datasheet, 74HC circuit, 74HC data sheet: ETC1 – OCTAL D- TYPE FLIP-FLOP WITH DATA ENABLE POSITIVE EDGE TRIGGER,alldatasheet . 74HC Datasheet, 74HC PDF, 74HC Data sheet, 74HC manual, 74HC pdf, 74HC, datenblatt, Electronics 74HC, alldatasheet, free.
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The is specified in compliance More information. Triple single-pole double-throw analog switch Rev. Start display at page:. Ordering information The is a programmable timer which consists of a stage binary counter, an integrated More information. Each has two address inputs na0 and na1, an active More information.
Low-power D-type flip-flop; positive-edge datssheet 3-state Rev.
74HC/HCT377 Octal D-type Flip-flop With Data Enable; Positive-edge Trigger
Data is shifted serially through the shift register on the. The input can be driven from either 3. It has four address inputs D0 to D3darasheet active. This feature allows the use of these. The outputs are fully buffered for the highest noise More information. This device can be used as two 8-bit transceivers or one bit transceiver.
It has a storage latch associated with each stage More information. The device features clock CP More information. Inputs also include clamp diodes that enable the use of current.
74HC Datasheet, PDF – Alldatasheet
This device consists of four full adders with fast More information. It is specified in.
Ordering information The decodes three binary weighted address inputs A0, A1 and A2 to eight mutually exclusive More information. The device is used primarily as a 6-bit edge-triggered storage register. This device consists of an 8 bit shift register and latch.
Synchronous operation More information. The gate switches More information. General description The is a single-pole throw analog switch SP16T suitable datasheet use in analog or digital It has control inputs for enabling or disabling the clock CPfor clearing the counter to its More information.
Dual D-type flip-flop Rev. It has a storage latch associated with each stage. Dual 4-bit binary ripple counter Rev.
Amanda Watkins 3 years ago Views: The outputs are open-drain and can be connected to other open-drain outputs to implement active-low More information. Ordering information The is a dual 4-input NOR gate. The is a bit More information. Ordering information The is a stage serial shift register. General description The is an 8-bit binary counter with a storage register and 3-state outputs. Ordering information The is a programmable timer which consists of a stage binary counter, an integrated.
The 3-state output is controlled by the output enable input OE. The DM74LS selects one-of-eight data sources.
It has control inputs for enabling or disabling the clock CPfor clearing the counter to its. The flip-flop will store the state of data input D that meet the set-up. Inputs also include clamp diodes that enable the use of current More information. Applications The is a edge-triggered dual JK flip-flop which features independent set-direct SDclear-direct More information.
General description The is an 8-bit D-type transparent latch with 3-state outputs. The is specified in compliance. Dual JK flip-flop with reset; negative-edge trigger Rev.